So, this 6202 chip, I take it that's what controls all of the supergrafx's new video functions? What all can it do?
It has two functions. The first function is obviously to mix the two video outputs together. There are two chips in the PC-Engine; the VDC (draws the sprites and background) and the VCE (holds the colors and palette ram, outputs RGB and composite signals). There's a digital 'pixel' bus between the VDC (video display controller) and VCE (video color encoder?). It's 9bits wide. All back ground pixels are output on the lower 8bits (0-255, thus 256 colors for BG layer). When a sprite pixel is output, the upper bit is set on the bus - thus allowing sprites to access the upper 256 color block.
Since the VDC pixel bus is digital, adding another chip to mix that pixel data is pretty easy. The VDC has a function where when no active pixel is being displayed (background or sprite), the very first sprite color pixel 0 is output instead. This normally never shows up because you need transparent parts of a sprite (otherwise they would looks like blocks). So you can always known when the VDC is output pixel data or not. The VPC (nick names 'Patty') looks for this. The VPC also looks at back ground color #0 (it doesn't know the real color for it, it just knows the pixel #) and uses that to show 'through' layers. Thus BG2/vdc2 can show underneath parts of BG1/vdc1.
The second function of the VPC, is that it provides some additional support in how to mix these layers. The backgrounds remain fixed as far as priorities go, but the sprites from each VDC can be setup in particular display orders. Not only that, but you can define 'how' the priority works on a pixel/scanline basis. What I mean be this, is that there are four windows registers. There are two windows (vdc 1 and vdc 2). There are a total of four window options that can happen between the two VDCs outputting pixels; windows 1 by itself, window 2 by itself, window 1 and 2 overlap, no window present. So you can set sprite priorities for each window logic. You also define the window. Well, you only control the width size of the window - starting from the left side (you can turn it off with a value lower than $40). These regs can be changed on a scanline basis. One option of the VPC is that sprite from VDC 1 are cut and put behind all layers (including both BG layers). But if the sprite priority inside the VDC itself is set to appear above the BG layer, the VPC will cut a hole in place of it. Some pretty weird and unique stuff that you can do with it.
There's also a function that makes the cpu ST0/ST1/ST2 opcodes store the immediate values directly to VDC #2 instead of VDC #1. That's pretty cool too. Both VDCs and the VPC are tied to the clock out of the VCE, so any horizontal resolution setting effects all the chips, so they're in sync with each other (VCE controls the dot clock of all these chips).
Two things they really missed out on; 8bit pixel mode by simply taking the upper 4bit of VDC1 and lower 4bits of VDC2, for a non sub-paletted display (and tile/sprite display of 8bit instead of 4bit). Charles Macdonald actually did a quick hard mod to his SGX and wrote a demo to show it off, for this effect. The other thing they could have done is limited transparency. Basically forcing the output of one VDC to use an alt subpalette (the upper 4bits of the 8bit pixel bus) on a per pixel basis. You would have to manually setup the alt subpalettes in cram, but that's easy to do (it would also split in half your subpalettes - but the PCE has way more than it really needs in that department).
The SGX also has the newer 6280a, which means it can stream high frequency samples on a single channel - much higher than 7khz. And with lower cpu resource too. Win/win.
