Can it be done? save RAM inside TE?

[wilykat]

Turbobooster, Turbobooster Plus, Tennokoe, and Backup Booster plus CD systems all have save RAM for in game saves. (there's also Save-kun and M128 but those are not usable with most games).

Express and GT do not and they do not have the expansion connector for one.

I have been looking at Tennokoe (cheapest) and it seems like I can cut the board to minimum including the custom NEC chip plus SRAM chip, add a super cap to the SRAM's + rail with a diode in line so the cap can be charged when TE is powered on, and keep SRAM from getting erased:


I've documented the pinouts from the EXT connector to the chip and SRAM and I'd need to clean up my notes, type it in text file, and double-check it all. Then figure out which CPU pins to tap.

Some of the components on one side of the bank is used for battery watchdog and can be removed in favor of a super cap and a diode. (was 4 transistors plus a dozen caps and resistors cheaper than one super cap back then?)

The only issue is about 30 wires from CPU to the save board.  Since Tennokoe didn't use some of the expansion pinouts (CD detect, video bus, etc) it cuts down some work from the full 69 pins but that's still a lot of work to do.  Also would I still have room to install it in a TE?  The wide ribbon cable from the mainboard to the cart board would be in the way.

[wilykat]

light red shaded area on NEC to EXT connector are no connection.  The middle EXT pinout are just for reference, and the third EXT pinout are those used by SRAM, those are shared with NEC chip.

Most of the connection are between custom NEC chip and the ext connector, with a few address lines shared with SRAM chip.  And a few connection (data and rest of address) are strictly between NEC chip and SRAM chip.  SRAM doesn't have its own connection to the EXT bus.

Preliminary detail, I still need to double check that I didn't miss any connection or get any wrong but this seems about right.  And it happens that all of the required pins can be tapped right off the cart connector so I could just tap onto the ribbon connector rather than directly off the CPU.  I'd suggest getting 5v and ground elsewhere, closer to the internal 5v regulator.

The only limiting factor is if I can get the board small enough to fit in the space between controller board and battery compartment with the cap mod to the SRAM for data retention.  And that my idea for a diode and cap is enough to hold data on SRAM for more than a few days without draining the batteries.

Even with the new LCD on my express, the password screen is still a pain in the ass to deal with so battery backed ram for some games would be wonderful.

[thesteve]

some of the neopce cards have save ram

[Fidde_se]

Where would the implementation of the save/ram menu be inserted, it should be loaded at startup like the CD menu, it might interfere with hu-cards, maybe a switch "to choose" a card with those instructions.

[wilykat]

Where would the implementation of the save/ram menu be inserted, it should be loaded at startup like the CD menu, it might interfere with hu-cards, maybe a switch "to choose" a card with those instructions.

There is no built in menu, the access to memory is dependent on the software such as Neutopia and CD system cards. Hucard that don't have save support simply ignores the save RAM.

To be clear, the save hardware I am using is Tennokoe 2 which is basically the same as Backup Booster or Turbobooster Plus, without external AV ports.  I am not doing anything with Tennokoe Bank card which does use Hucard slot and can't be used at the same time as Hucard games.

[wilykat]

^^ bump ^^

coming fresh off that BRAM hack I did on my Duo, I have set my eyes on this.  Instead of cutting up the old Tennokoe2 board I'd try to make a new PCB, transplant the propriety HuC6201 chip and add in 2k SRAM or FRAM.  The smallest FRAM seems to be 8kx8 so I would have to ground extra address to lock them in 2k bank, maybe a cut away jumper trace if I decide to convert it to multi-paged mode?

Right now I need to figure out the correct pin spacing on HuCard slot so I can make easy solder-on connection to the PCB, and to find an odd 64 pin QFP solder pad in the library, the ones I found were all 16 pins by 16 pins square, none that is 10 pins long by 13 pins wide.

EDIT: I found 2 errors in the chart above.  B10 goes to NEC 28 not 26, and C16 goes to SRAM 2 not 21.  Also I omitted the VCC and GND:

NEC 25 is VCC
SRAM 24 is battery backed VCC (can use cap and a diode or with FRAM, direct to VCC)
NEC 26, 58, and SRAM 12 are GND

[thesteve]

ok here is a thought
how is save addressed?
if its a hard address then this is simple, but if its mapped not so much

[wilykat]

Addressed the same way as TurboBooster Plus and Tennokoe.  Some Hucard games can access the save this way, and this is what I am aiming for.  Trying to read or type in password for Neutopia 2 on a tiny screen is too much hassle. 

One could use System card or BRAM viewer (via TED) to access the save RAM to check for files and reformat them.

[wilykat]

Prelim schematic:

The pin number on connectors are for Hucard slot connectors. Since all of the required lines are at Hucard slot, it should be fairly easy to tap into the connector.

The 8 data lines correspond to TG-16 pinout and from the HuC6201 chip, 8 lines needs to be flipped (15 and 23, 16 and 22, 17 and 21, and 19 and 20) to work on PCEngine, LT, and GT.

Also LED is optional, I left it in as a status indicator but won't be present on final form.  Also I am going with FRAM so I don't need to deal with caps. FRAM doesn't come smaller than 32kx8 so there's 4 jumper pads to tie them to ground and lock them in specific 2k block for now. The jumper will allow me to add the switch mod I made in other thread for the board to be used in TG-16 and PCE/CGFx as there's room in those consoles.  TE and GT does not have much room.

FWIW this is not useful in Duo for obvious reason.

[thesteve]

ok i suspect im looking at an address range decoder
can we get a programmer to give the address range, and if its shared or not
determine the proper addressing scheme and we should be able to set up a GAL or 2 as the interface circuit, so there is no need to destroy an official save device

[blueraven]

This thread is awesome. Thank you guys for doing this.

[TheOldMan]

IF I remember right (and I may not...)

ok i suspect im looking at an address range decoder

You need to watch $1803 in the I/O area (bank $7f?). One of the bits 'unlocks' the BRAM.
I think it then appears at $8000. I don't -think- you need to map it in.

Best bet is to ask bonknuts or elmer. They seem to really know the hardware from a programming pov.

EDIT:
Just checked the bios code. It maps the I/O page to $8000-$9fff,  before unlocking BRAM. Not sure how that works, but it then checks for the format string at $8000...
Unlock bit is 7 ($80).

[wilykat]

That is what I figured.  That HuC6201 is used as a watchdog that monitors specific address and data and connects 2k SRAM to the game when the condition is right.  Sort of like a bankswitching chip.

I think CPLD is the minimum needed because there's 20 addresses, 8 data, optional LED output, battery checker, and reset plus some address, /ce, /oe, and 8 data, to connect.  The schematic I did above should help figure out the design.

[thesteve]

well consider this
the data lines can go directly to the RAM as CE can put the RAM into tri-state
if the RAM is directly addressed then the addresses also can go directly to RAM
that leaves a supporting chip requirement being to decode CE as RD WR should be from system bus directly

[TheOldMan]

the data lines can go directly to the RAM as CE can put the RAM into tri-state

Wouldn't you need all the address lines to catch the unlock address?